1. Field of the Invention
The present invention relates generally to tape structures that are used in assemblies of semiconductor device components, such as the flexible dielectric tapes that are used in tape automated bonding (TAB) and tape ball grid array (TOGA) packages. Particularly, the tapes of the present invention have stiffeners, or support structures, thereon. More specifically, the present invention relates to tapes with stereolithographically fabricated stiffeners. The present invention also relates to assemblies of semiconductor device components that include the tapes of the present invention and to stereolithographic methods for fabricating stiffeners on the tapes.
2. Background of Related Art
In some state of the art semiconductor devices, flexible dielectric tapes with electrical traces thereon are used to connect different semiconductor device components. As a first exemplary use of tapes in semiconductor devices, TAB employs flexible dielectric tapes with circuit traces thereon to electrically connect different semiconductor device components, such as dice and lead frames or circuit boards. In another example of the use of tape in semiconductor devices, a tape with circuit traces thereon may be used as an interposer in a TBGA package to reroute the outputs of a semiconductor device from the bond pad locations on a semiconductor die with which the tape is assembled to different contact pad locations on the tape to which conductive balls or bumps are mounted.
Tapes used in assemblies of semiconductor device components include a thin, flexible dielectric film with conductive traces and contact pads formed thereon. Typically, the dielectric films of such tapes are formed from polyimide or other suitable polymers. These films are usually only a few mils (e.g., 6 mils) thick to provide a desired amount of flexibility and to avoid a substantial increase in the overall thickness of an assembly of semiconductor device components that includes such an electrically connective tape. The conductive traces and contact pads on such films may be formed from a suitable conductive material, such as copper or aluminum.
Since these tapes are usually flexible, it is sometimes difficult to hold the tape in place to make the desired connections with a semiconductor device component. This is particularly true in TBGA packages, where torsional flexion and bending of the tape are undesirable during bonding of the contact pads of the tape to the bond pads of a semiconductor die. Bending of such tapes is also somewhat undesirable in TAB operations where a row of bond pads, other contact pads, or leads of a semiconductor device component are being bonded to an adjacent row of contact pads on the tape.
In response to these problems, thicker, less flexible tapes have been developed, as have tapes with heavier circuit traces that are positioned to counteract undesirable flexion or bending. Also, tapes that are to be used as interposers in TBGA packages are often supported by a rigid frame, such as a copper or aluminum frame, in order to prevent undesirable torsional flexion and bending of the tape during assembly with, and bonding to, one or more semiconductor dice. When the area of the TBGA interposer is relatively large compared to the area of the semiconductor die, these frames, or stiffeners, may remain in place on the tape so as to support the portions of the tape that extend laterally beyond the periphery of the semiconductor die. Stiffeners that remain in place with respect to the tape following connection of the tape to a semiconductor die are usually electrically isolated from the circuits of the TBGA package.
Exemplary TBGA tapes with metal stiffeners and packages including the same are disclosed in U.S. Pat. No. 6,002,169, issued to Chia et al. on Dec. 14, 1999; U.S. Pat. No. 5,844,168, issued to Schueller et al. on Dec. 1, 1998; U.S. Pat. No. 5,843,808, issued to Karnezos on Dec. 1, 1998; U.S. Pat. No. 5,663,530, issued to Schueller et al. on Sep. 2, 1997; U.S. Pat. No. 5,409,865, issued to Karnezos on Apr. 25, 1995; and U.S. Pat. No. 5,397,921, issued to Karnezos on Mar. 14, 1995.
As shown in FIG. 1, in the assembly of a carrier tape 14 to a semiconductor die to form a TBGA package, several TBGA tapes 14 are typically connected to one another in an elongate strip 10, similar to a roll of photographic film. A semiconductor die is connected on its active surface to each TBGA tape 14 of elongate strip 10. Prior to connecting a semiconductor die to the next, adjacent tape 14, strip 10 is moved laterally. Typically, strip 10 includes sprocket or indexing holes 18 near the top and bottom edges 11, 12 thereof to facilitate such lateral movement. Conventionally, the entire strip 10 of tapes 14 is carried on a metal (e.g. copper) stiffener or frame 1. Following connection of a semiconductor die to a TBGA tape 14, the semiconductor die-TBGA tape assembly, which forms a TBGA package, is severed from strip 10.
While conventional metal stiffeners provide support to a tape to be used in a TBGA package, they only support the tape for purposes of connection to the semiconductor die and portions of the tape that extend laterally beyond the periphery of the semiconductor die. Thus, other portions of the tape that are prone to flexing or damage during assembly of the tape with a semiconductor die, such as the sprocket or indexing holes of a strip of TBGA tapes, are not reinforced. Due to the relative thinness and delicacy of these portions of the tape, however, such reinforcement is desirable.
In the past decade, a manufacturing technique termed xe2x80x9cstereolithography,xe2x80x9d also known as xe2x80x9clayered manufacturing,xe2x80x9d has evolved to a degree where it is employed in many industries.
Essentially, stereolithography as conventionally practiced involves utilizing a computer to generate a three-dimensional (3-D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3-D computer-aided design (CAD) software. The model or simulation is mathematically separated or xe2x80x9cslicedxe2x80x9d into a large number of relatively thin, parallel usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.
The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and nonmetallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries, followed by selective consolidation or fixation of the material to at least a partially consolidated, or semisolid, state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer of the object to be fabricated. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated or fixed, or a separate binder material may be employed to bond material particles to one another and to those of a previously formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next-lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces is highly dependent upon particle size, whereas when a liquid is employed, surface resolution is highly dependent upon the minimum surface area of the liquid which can be fixed and the minimum thickness of a layer that can be generated. Of course, in either case, resolution and accuracy of object reproduction from the CAD file is also dependent upon the ability of the apparatus used to fix the material to precisely track the mathematical instructions indicating solid areas and boundaries for each layer of material. Toward that end, and depending upon the layer being fixed, various fixation approaches have been employed, including particle bombardment (electron beams), disposing a binder or other fixative (such as by ink-jet printing techniques), or irradiation using heat or specific wavelength ranges.
An early application of stereolithography was to enable rapid fabrication of molds and prototypes of objects from CAD files Thus, either male or female forms on which mold material might be disposed might be rapidly generated. Prototypes of objects might be built to verify the accuracy of the CAD file defining the object and to detect any design deficiencies and possible fabrication problems before a design was committed to large-scale production.
In more recent years, stereolithography has been employed to develop and refine object designs in relatively inexpensive materials, and has also been used to fabricate small quantities of objects where the cost of conventional fabrication techniques is prohibitive for same, such as in the case of plastic objects conventionally formed by injection molding. It is also known to employ stereolithography in the custom fabrication of products generally built in small quantities or where a product design is rendered only once. Finally, it has been appreciated in some industries that stereolithography provides a capability to fabricate products, such as those including closed interior chambers or convoluted passageways, which cannot be fabricated satisfactorily using conventional manufacturing techniques. It has also been recognized in some industries that a stereolithographic object or component may be formed or built around another, preexisting object or component to create a larger product.
However, to the inventor""s knowledge, stereolithography has yet to be applied to mass production of articles in volumes of thousands or millions, or employed to produce, augment or enhance products including other, pre-existing components in large quantities, where minute component sizes are involved, and where extremely high resolution and a high degree of reproducibility of results are required. In particular, the inventor is not aware of the use of stereolithography to fabricate stiffeners for tapes that are used to electrically connect semiconductor devices to other semiconductor device components, such as other semiconductor devices or substrates. Furthermore, conventional stereolithography apparatus and methods fail to address the difficulties of precisely locating and orienting a number of pre-existing components for stereolithographic application of material thereto without the use of mechanical alignment techniques or to otherwise assuring precise, repeatable placement of components.
The present invention includes stiffeners for use on tapes such as TBGA tapes and other tapes that may be suitable for use in TAB applications. The present invention also includes tapes with such stiffeners, as well as semiconductor devices and assemblies including tapes with such stiffeners.
The stiffeners of the present invention are preferably fabricated from a dielectric material, such as a dielectric photoimageable polymer. The stiffeners may have any configuration and are preferably shaped to prevent torsional flexion and bending of the tape. For example, a stiffener may be located adjacent substantially the periphery of a tape. Alternatively, a stiffener may include one or more elongate, straight or nonlinear elements that traverse the tape. As another alternative, a stiffener may include a sheet of material that laterally spreads across a portion of the area of the tape. Stiffeners configured as sheets may include apertures through which electrical traces or conductive elements extend to facilitate electrical connections through the tape.
The stiffeners of the present invention may also be configured to reinforce sprocket or indexing holes through the tape. For example, elongate stiffeners may be located at the top and bottom of a strip of tape, with sprocket or indexing holes being formed therethrough. Alternatively, rings may be formed around individual sprocket or indexing holes or around groups of sprocket or indexing holes to reinforce same.
According to another aspect, the present invention includes a method for fabricating the stiffeners. In a preferred embodiment of the method, a computer-controlled, 3-D CAD initiated process known as xe2x80x9cstereolithographyxe2x80x9d or xe2x80x9clayered manufacturingxe2x80x9d is used to fabricate the stiffeners. When stereolithographic processes are employed, each stiffener is formed as either a single layer or a series of superimposed, contiguous, mutually adhered layers of material.
The stereolithographic method of fabricating the stiffeners of the present invention preferably includes the use of a machine vision system to locate tapes on which the stiffeners are to be fabricated, as well as the features or other components on or associated with the tapes (e.g., circuit traces, contact pads, etc.). The use of a machine vision system directs the alignment of a stereolithography system with each tape for material disposition purposes. Accordingly, the tape need not be precisely mechanically aligned with any component of the stereolithography system to practice the stereolithographic embodiment of the method of the present invention.
In a preferred embodiment, the stiffeners to be fabricated upon or positioned upon and secured to a tape or strip of tapes in accordance with the invention are fabricated using precisely focused electromagnetic radiation in the form of an ultraviolet (UV) wavelength laser under control of a computer and responsive to input from a machine vision system, such as a pattern recognition system, to fix or cure selected regions of a layer of a liquid photopolymer material disposed on the semiconductor device or other substrate.